// ******************************************************************************
// Copyright     :  Copyright (C) 2021, Hisilicon Technologies Co. Ltd.
// File name     :  hipciec_nvme_pf_local_ctrl_reg_reg_offset.h
// Department    :  CAD Development Department
// Author        :  xxx
// Version       :  1.0
// Date          :  2021/10/23
// Description   :  The description of xxx project
// Others        :  Generated automatically by nManager V4.2
// History       :  xxx 2021/10/23 11:22:07 Create file
// ******************************************************************************

#ifndef __HIPCIEC_NVME_PF_LOCAL_CTRL_REG_REG_OFFSET_H__
#define __HIPCIEC_NVME_PF_LOCAL_CTRL_REG_REG_OFFSET_H__

/* HIPCIEC_NVME_PF_LOCAL_CTRL_REG Base address of Module's Register */
#define HiPCIECTRL40V200_HIPCIEC_NVME_PF_LOCAL_CTRL_REG_BASE                       (0x00000000)


/******************************************************************************/
/*                      HiPCIECTRL40V200 HIPCIEC_NVME_PF_LOCAL_CTRL_REG Registers' Definitions                            */
/******************************************************************************/

#define HiPCIECTRL40V200_HIPCIEC_NVME_PF_LOCAL_CTRL_REG_NVME_CTRL_CAP_LOW_REG  (HiPCIECTRL40V200_HIPCIEC_NVME_PF_LOCAL_CTRL_REG_BASE + 0x0)    /* NVMe Controller Capabilities Low */
#define HiPCIECTRL40V200_HIPCIEC_NVME_PF_LOCAL_CTRL_REG_NVME_CTRL_CAP_HIGH_REG (HiPCIECTRL40V200_HIPCIEC_NVME_PF_LOCAL_CTRL_REG_BASE + 0x4)    /* NVMe Controller Capabilities High */
#define HiPCIECTRL40V200_HIPCIEC_NVME_PF_LOCAL_CTRL_REG_NVME_CTRL_VS_REG       (HiPCIECTRL40V200_HIPCIEC_NVME_PF_LOCAL_CTRL_REG_BASE + 0x8)    /* NVMe Controller Version */
#define HiPCIECTRL40V200_HIPCIEC_NVME_PF_LOCAL_CTRL_REG_NVME_CTRL_INTMS_REG    (HiPCIECTRL40V200_HIPCIEC_NVME_PF_LOCAL_CTRL_REG_BASE + 0xC)    /* NVMe Controller Interrupt Mask */
#define HiPCIECTRL40V200_HIPCIEC_NVME_PF_LOCAL_CTRL_REG_NVME_CTRL_INTMC_REG    (HiPCIECTRL40V200_HIPCIEC_NVME_PF_LOCAL_CTRL_REG_BASE + 0x10)   /* NVMe Controller Interrupt Clear */
#define HiPCIECTRL40V200_HIPCIEC_NVME_PF_LOCAL_CTRL_REG_NVME_CTRL_CONFIG_REG   (HiPCIECTRL40V200_HIPCIEC_NVME_PF_LOCAL_CTRL_REG_BASE + 0x14)   /* NVMe Controller Configuration */
#define HiPCIECTRL40V200_HIPCIEC_NVME_PF_LOCAL_CTRL_REG_NVME_CTRL_STATUS_REG   (HiPCIECTRL40V200_HIPCIEC_NVME_PF_LOCAL_CTRL_REG_BASE + 0x1C)   /* NVMe Controller Status */
#define HiPCIECTRL40V200_HIPCIEC_NVME_PF_LOCAL_CTRL_REG_NVME_SUBSYS_RST_REG    (HiPCIECTRL40V200_HIPCIEC_NVME_PF_LOCAL_CTRL_REG_BASE + 0x20)   /* NVMe subsystem Reset */
#define HiPCIECTRL40V200_HIPCIEC_NVME_PF_LOCAL_CTRL_REG_AQA_REG                (HiPCIECTRL40V200_HIPCIEC_NVME_PF_LOCAL_CTRL_REG_BASE + 0x24)   /* NVMe Admin Queue Attributes */
#define HiPCIECTRL40V200_HIPCIEC_NVME_PF_LOCAL_CTRL_REG_ASQB_LOW_REG           (HiPCIECTRL40V200_HIPCIEC_NVME_PF_LOCAL_CTRL_REG_BASE + 0x28)   /* NVMe Admin Submission Queue Base Addrss low */
#define HiPCIECTRL40V200_HIPCIEC_NVME_PF_LOCAL_CTRL_REG_ASQB_HIGH_REG          (HiPCIECTRL40V200_HIPCIEC_NVME_PF_LOCAL_CTRL_REG_BASE + 0x2C)   /* NVMe Admin Submission Queue Base Addrss high */
#define HiPCIECTRL40V200_HIPCIEC_NVME_PF_LOCAL_CTRL_REG_ACQB_LOW_REG           (HiPCIECTRL40V200_HIPCIEC_NVME_PF_LOCAL_CTRL_REG_BASE + 0x30)   /* NVMe Admin Completion Queue Base Address low */
#define HiPCIECTRL40V200_HIPCIEC_NVME_PF_LOCAL_CTRL_REG_ACQB_HIGH_REG          (HiPCIECTRL40V200_HIPCIEC_NVME_PF_LOCAL_CTRL_REG_BASE + 0x34)   /* NVMe Admin Completion Queue Base Address high */
#define HiPCIECTRL40V200_HIPCIEC_NVME_PF_LOCAL_CTRL_REG_CMBLOC_REG             (HiPCIECTRL40V200_HIPCIEC_NVME_PF_LOCAL_CTRL_REG_BASE + 0x38)   /* NVMe Controller Memory Buffer Location */
#define HiPCIECTRL40V200_HIPCIEC_NVME_PF_LOCAL_CTRL_REG_CMBSZ_REG              (HiPCIECTRL40V200_HIPCIEC_NVME_PF_LOCAL_CTRL_REG_BASE + 0x3C)   /* NVMe Controller Memory Buffer Size */
#define HiPCIECTRL40V200_HIPCIEC_NVME_PF_LOCAL_CTRL_REG_SQTDBL_0_REG           (HiPCIECTRL40V200_HIPCIEC_NVME_PF_LOCAL_CTRL_REG_BASE + 0x1000) /* SQ Ring tail doorbell */
#define HiPCIECTRL40V200_HIPCIEC_NVME_PF_LOCAL_CTRL_REG_SQTDBL_1_REG           (HiPCIECTRL40V200_HIPCIEC_NVME_PF_LOCAL_CTRL_REG_BASE + 0x1008) /* SQ Ring tail doorbell */
#define HiPCIECTRL40V200_HIPCIEC_NVME_PF_LOCAL_CTRL_REG_SQTDBL_2_REG           (HiPCIECTRL40V200_HIPCIEC_NVME_PF_LOCAL_CTRL_REG_BASE + 0x1010) /* SQ Ring tail doorbell */
#define HiPCIECTRL40V200_HIPCIEC_NVME_PF_LOCAL_CTRL_REG_SQTDBL_3_REG           (HiPCIECTRL40V200_HIPCIEC_NVME_PF_LOCAL_CTRL_REG_BASE + 0x1018) /* SQ Ring tail doorbell */
#define HiPCIECTRL40V200_HIPCIEC_NVME_PF_LOCAL_CTRL_REG_SQTDBL_4_REG           (HiPCIECTRL40V200_HIPCIEC_NVME_PF_LOCAL_CTRL_REG_BASE + 0x1020) /* SQ Ring tail doorbell */
#define HiPCIECTRL40V200_HIPCIEC_NVME_PF_LOCAL_CTRL_REG_SQTDBL_5_REG           (HiPCIECTRL40V200_HIPCIEC_NVME_PF_LOCAL_CTRL_REG_BASE + 0x1028) /* SQ Ring tail doorbell */
#define HiPCIECTRL40V200_HIPCIEC_NVME_PF_LOCAL_CTRL_REG_SQTDBL_6_REG           (HiPCIECTRL40V200_HIPCIEC_NVME_PF_LOCAL_CTRL_REG_BASE + 0x1030) /* SQ Ring tail doorbell */
#define HiPCIECTRL40V200_HIPCIEC_NVME_PF_LOCAL_CTRL_REG_SQTDBL_7_REG           (HiPCIECTRL40V200_HIPCIEC_NVME_PF_LOCAL_CTRL_REG_BASE + 0x1038) /* SQ Ring tail doorbell */
#define HiPCIECTRL40V200_HIPCIEC_NVME_PF_LOCAL_CTRL_REG_SQTDBL_8_REG           (HiPCIECTRL40V200_HIPCIEC_NVME_PF_LOCAL_CTRL_REG_BASE + 0x1040) /* SQ Ring tail doorbell */
#define HiPCIECTRL40V200_HIPCIEC_NVME_PF_LOCAL_CTRL_REG_SQTDBL_9_REG           (HiPCIECTRL40V200_HIPCIEC_NVME_PF_LOCAL_CTRL_REG_BASE + 0x1048) /* SQ Ring tail doorbell */
#define HiPCIECTRL40V200_HIPCIEC_NVME_PF_LOCAL_CTRL_REG_SQTDBL_10_REG          (HiPCIECTRL40V200_HIPCIEC_NVME_PF_LOCAL_CTRL_REG_BASE + 0x1050) /* SQ Ring tail doorbell */
#define HiPCIECTRL40V200_HIPCIEC_NVME_PF_LOCAL_CTRL_REG_SQTDBL_11_REG          (HiPCIECTRL40V200_HIPCIEC_NVME_PF_LOCAL_CTRL_REG_BASE + 0x1058) /* SQ Ring tail doorbell */
#define HiPCIECTRL40V200_HIPCIEC_NVME_PF_LOCAL_CTRL_REG_SQTDBL_12_REG          (HiPCIECTRL40V200_HIPCIEC_NVME_PF_LOCAL_CTRL_REG_BASE + 0x1060) /* SQ Ring tail doorbell */
#define HiPCIECTRL40V200_HIPCIEC_NVME_PF_LOCAL_CTRL_REG_SQTDBL_13_REG          (HiPCIECTRL40V200_HIPCIEC_NVME_PF_LOCAL_CTRL_REG_BASE + 0x1068) /* SQ Ring tail doorbell */
#define HiPCIECTRL40V200_HIPCIEC_NVME_PF_LOCAL_CTRL_REG_SQTDBL_14_REG          (HiPCIECTRL40V200_HIPCIEC_NVME_PF_LOCAL_CTRL_REG_BASE + 0x1070) /* SQ Ring tail doorbell */
#define HiPCIECTRL40V200_HIPCIEC_NVME_PF_LOCAL_CTRL_REG_SQTDBL_15_REG          (HiPCIECTRL40V200_HIPCIEC_NVME_PF_LOCAL_CTRL_REG_BASE + 0x1078) /* SQ Ring tail doorbell */
#define HiPCIECTRL40V200_HIPCIEC_NVME_PF_LOCAL_CTRL_REG_SQTDBL_16_REG          (HiPCIECTRL40V200_HIPCIEC_NVME_PF_LOCAL_CTRL_REG_BASE + 0x1080) /* SQ Ring tail doorbell */
#define HiPCIECTRL40V200_HIPCIEC_NVME_PF_LOCAL_CTRL_REG_SQTDBL_17_REG          (HiPCIECTRL40V200_HIPCIEC_NVME_PF_LOCAL_CTRL_REG_BASE + 0x1088) /* SQ Ring tail doorbell */
#define HiPCIECTRL40V200_HIPCIEC_NVME_PF_LOCAL_CTRL_REG_SQTDBL_18_REG          (HiPCIECTRL40V200_HIPCIEC_NVME_PF_LOCAL_CTRL_REG_BASE + 0x1090) /* SQ Ring tail doorbell */
#define HiPCIECTRL40V200_HIPCIEC_NVME_PF_LOCAL_CTRL_REG_SQTDBL_19_REG          (HiPCIECTRL40V200_HIPCIEC_NVME_PF_LOCAL_CTRL_REG_BASE + 0x1098) /* SQ Ring tail doorbell */
#define HiPCIECTRL40V200_HIPCIEC_NVME_PF_LOCAL_CTRL_REG_SQTDBL_20_REG          (HiPCIECTRL40V200_HIPCIEC_NVME_PF_LOCAL_CTRL_REG_BASE + 0x10A0) /* SQ Ring tail doorbell */
#define HiPCIECTRL40V200_HIPCIEC_NVME_PF_LOCAL_CTRL_REG_SQTDBL_21_REG          (HiPCIECTRL40V200_HIPCIEC_NVME_PF_LOCAL_CTRL_REG_BASE + 0x10A8) /* SQ Ring tail doorbell */
#define HiPCIECTRL40V200_HIPCIEC_NVME_PF_LOCAL_CTRL_REG_SQTDBL_22_REG          (HiPCIECTRL40V200_HIPCIEC_NVME_PF_LOCAL_CTRL_REG_BASE + 0x10B0) /* SQ Ring tail doorbell */
#define HiPCIECTRL40V200_HIPCIEC_NVME_PF_LOCAL_CTRL_REG_SQTDBL_23_REG          (HiPCIECTRL40V200_HIPCIEC_NVME_PF_LOCAL_CTRL_REG_BASE + 0x10B8) /* SQ Ring tail doorbell */
#define HiPCIECTRL40V200_HIPCIEC_NVME_PF_LOCAL_CTRL_REG_SQTDBL_24_REG          (HiPCIECTRL40V200_HIPCIEC_NVME_PF_LOCAL_CTRL_REG_BASE + 0x10C0) /* SQ Ring tail doorbell */
#define HiPCIECTRL40V200_HIPCIEC_NVME_PF_LOCAL_CTRL_REG_SQTDBL_25_REG          (HiPCIECTRL40V200_HIPCIEC_NVME_PF_LOCAL_CTRL_REG_BASE + 0x10C8) /* SQ Ring tail doorbell */
#define HiPCIECTRL40V200_HIPCIEC_NVME_PF_LOCAL_CTRL_REG_SQTDBL_26_REG          (HiPCIECTRL40V200_HIPCIEC_NVME_PF_LOCAL_CTRL_REG_BASE + 0x10D0) /* SQ Ring tail doorbell */
#define HiPCIECTRL40V200_HIPCIEC_NVME_PF_LOCAL_CTRL_REG_SQTDBL_27_REG          (HiPCIECTRL40V200_HIPCIEC_NVME_PF_LOCAL_CTRL_REG_BASE + 0x10D8) /* SQ Ring tail doorbell */
#define HiPCIECTRL40V200_HIPCIEC_NVME_PF_LOCAL_CTRL_REG_SQTDBL_28_REG          (HiPCIECTRL40V200_HIPCIEC_NVME_PF_LOCAL_CTRL_REG_BASE + 0x10E0) /* SQ Ring tail doorbell */
#define HiPCIECTRL40V200_HIPCIEC_NVME_PF_LOCAL_CTRL_REG_SQTDBL_29_REG          (HiPCIECTRL40V200_HIPCIEC_NVME_PF_LOCAL_CTRL_REG_BASE + 0x10E8) /* SQ Ring tail doorbell */
#define HiPCIECTRL40V200_HIPCIEC_NVME_PF_LOCAL_CTRL_REG_SQTDBL_30_REG          (HiPCIECTRL40V200_HIPCIEC_NVME_PF_LOCAL_CTRL_REG_BASE + 0x10F0) /* SQ Ring tail doorbell */
#define HiPCIECTRL40V200_HIPCIEC_NVME_PF_LOCAL_CTRL_REG_SQTDBL_31_REG          (HiPCIECTRL40V200_HIPCIEC_NVME_PF_LOCAL_CTRL_REG_BASE + 0x10F8) /* SQ Ring tail doorbell */
#define HiPCIECTRL40V200_HIPCIEC_NVME_PF_LOCAL_CTRL_REG_SQTDBL_32_REG          (HiPCIECTRL40V200_HIPCIEC_NVME_PF_LOCAL_CTRL_REG_BASE + 0x1100) /* SQ Ring tail doorbell */
#define HiPCIECTRL40V200_HIPCIEC_NVME_PF_LOCAL_CTRL_REG_SQTDBL_33_REG          (HiPCIECTRL40V200_HIPCIEC_NVME_PF_LOCAL_CTRL_REG_BASE + 0x1108) /* SQ Ring tail doorbell */
#define HiPCIECTRL40V200_HIPCIEC_NVME_PF_LOCAL_CTRL_REG_SQTDBL_34_REG          (HiPCIECTRL40V200_HIPCIEC_NVME_PF_LOCAL_CTRL_REG_BASE + 0x1110) /* SQ Ring tail doorbell */
#define HiPCIECTRL40V200_HIPCIEC_NVME_PF_LOCAL_CTRL_REG_SQTDBL_35_REG          (HiPCIECTRL40V200_HIPCIEC_NVME_PF_LOCAL_CTRL_REG_BASE + 0x1118) /* SQ Ring tail doorbell */
#define HiPCIECTRL40V200_HIPCIEC_NVME_PF_LOCAL_CTRL_REG_SQTDBL_36_REG          (HiPCIECTRL40V200_HIPCIEC_NVME_PF_LOCAL_CTRL_REG_BASE + 0x1120) /* SQ Ring tail doorbell */
#define HiPCIECTRL40V200_HIPCIEC_NVME_PF_LOCAL_CTRL_REG_SQTDBL_37_REG          (HiPCIECTRL40V200_HIPCIEC_NVME_PF_LOCAL_CTRL_REG_BASE + 0x1128) /* SQ Ring tail doorbell */
#define HiPCIECTRL40V200_HIPCIEC_NVME_PF_LOCAL_CTRL_REG_SQTDBL_38_REG          (HiPCIECTRL40V200_HIPCIEC_NVME_PF_LOCAL_CTRL_REG_BASE + 0x1130) /* SQ Ring tail doorbell */
#define HiPCIECTRL40V200_HIPCIEC_NVME_PF_LOCAL_CTRL_REG_SQTDBL_39_REG          (HiPCIECTRL40V200_HIPCIEC_NVME_PF_LOCAL_CTRL_REG_BASE + 0x1138) /* SQ Ring tail doorbell */
#define HiPCIECTRL40V200_HIPCIEC_NVME_PF_LOCAL_CTRL_REG_SQTDBL_40_REG          (HiPCIECTRL40V200_HIPCIEC_NVME_PF_LOCAL_CTRL_REG_BASE + 0x1140) /* SQ Ring tail doorbell */
#define HiPCIECTRL40V200_HIPCIEC_NVME_PF_LOCAL_CTRL_REG_SQTDBL_41_REG          (HiPCIECTRL40V200_HIPCIEC_NVME_PF_LOCAL_CTRL_REG_BASE + 0x1148) /* SQ Ring tail doorbell */
#define HiPCIECTRL40V200_HIPCIEC_NVME_PF_LOCAL_CTRL_REG_SQTDBL_42_REG          (HiPCIECTRL40V200_HIPCIEC_NVME_PF_LOCAL_CTRL_REG_BASE + 0x1150) /* SQ Ring tail doorbell */
#define HiPCIECTRL40V200_HIPCIEC_NVME_PF_LOCAL_CTRL_REG_SQTDBL_43_REG          (HiPCIECTRL40V200_HIPCIEC_NVME_PF_LOCAL_CTRL_REG_BASE + 0x1158) /* SQ Ring tail doorbell */
#define HiPCIECTRL40V200_HIPCIEC_NVME_PF_LOCAL_CTRL_REG_SQTDBL_44_REG          (HiPCIECTRL40V200_HIPCIEC_NVME_PF_LOCAL_CTRL_REG_BASE + 0x1160) /* SQ Ring tail doorbell */
#define HiPCIECTRL40V200_HIPCIEC_NVME_PF_LOCAL_CTRL_REG_SQTDBL_45_REG          (HiPCIECTRL40V200_HIPCIEC_NVME_PF_LOCAL_CTRL_REG_BASE + 0x1168) /* SQ Ring tail doorbell */
#define HiPCIECTRL40V200_HIPCIEC_NVME_PF_LOCAL_CTRL_REG_SQTDBL_46_REG          (HiPCIECTRL40V200_HIPCIEC_NVME_PF_LOCAL_CTRL_REG_BASE + 0x1170) /* SQ Ring tail doorbell */
#define HiPCIECTRL40V200_HIPCIEC_NVME_PF_LOCAL_CTRL_REG_SQTDBL_47_REG          (HiPCIECTRL40V200_HIPCIEC_NVME_PF_LOCAL_CTRL_REG_BASE + 0x1178) /* SQ Ring tail doorbell */
#define HiPCIECTRL40V200_HIPCIEC_NVME_PF_LOCAL_CTRL_REG_SQTDBL_48_REG          (HiPCIECTRL40V200_HIPCIEC_NVME_PF_LOCAL_CTRL_REG_BASE + 0x1180) /* SQ Ring tail doorbell */
#define HiPCIECTRL40V200_HIPCIEC_NVME_PF_LOCAL_CTRL_REG_SQTDBL_49_REG          (HiPCIECTRL40V200_HIPCIEC_NVME_PF_LOCAL_CTRL_REG_BASE + 0x1188) /* SQ Ring tail doorbell */
#define HiPCIECTRL40V200_HIPCIEC_NVME_PF_LOCAL_CTRL_REG_SQTDBL_50_REG          (HiPCIECTRL40V200_HIPCIEC_NVME_PF_LOCAL_CTRL_REG_BASE + 0x1190) /* SQ Ring tail doorbell */
#define HiPCIECTRL40V200_HIPCIEC_NVME_PF_LOCAL_CTRL_REG_SQTDBL_51_REG          (HiPCIECTRL40V200_HIPCIEC_NVME_PF_LOCAL_CTRL_REG_BASE + 0x1198) /* SQ Ring tail doorbell */
#define HiPCIECTRL40V200_HIPCIEC_NVME_PF_LOCAL_CTRL_REG_SQTDBL_52_REG          (HiPCIECTRL40V200_HIPCIEC_NVME_PF_LOCAL_CTRL_REG_BASE + 0x11A0) /* SQ Ring tail doorbell */
#define HiPCIECTRL40V200_HIPCIEC_NVME_PF_LOCAL_CTRL_REG_SQTDBL_53_REG          (HiPCIECTRL40V200_HIPCIEC_NVME_PF_LOCAL_CTRL_REG_BASE + 0x11A8) /* SQ Ring tail doorbell */
#define HiPCIECTRL40V200_HIPCIEC_NVME_PF_LOCAL_CTRL_REG_SQTDBL_54_REG          (HiPCIECTRL40V200_HIPCIEC_NVME_PF_LOCAL_CTRL_REG_BASE + 0x11B0) /* SQ Ring tail doorbell */
#define HiPCIECTRL40V200_HIPCIEC_NVME_PF_LOCAL_CTRL_REG_SQTDBL_55_REG          (HiPCIECTRL40V200_HIPCIEC_NVME_PF_LOCAL_CTRL_REG_BASE + 0x11B8) /* SQ Ring tail doorbell */
#define HiPCIECTRL40V200_HIPCIEC_NVME_PF_LOCAL_CTRL_REG_SQTDBL_56_REG          (HiPCIECTRL40V200_HIPCIEC_NVME_PF_LOCAL_CTRL_REG_BASE + 0x11C0) /* SQ Ring tail doorbell */
#define HiPCIECTRL40V200_HIPCIEC_NVME_PF_LOCAL_CTRL_REG_SQTDBL_57_REG          (HiPCIECTRL40V200_HIPCIEC_NVME_PF_LOCAL_CTRL_REG_BASE + 0x11C8) /* SQ Ring tail doorbell */
#define HiPCIECTRL40V200_HIPCIEC_NVME_PF_LOCAL_CTRL_REG_SQTDBL_58_REG          (HiPCIECTRL40V200_HIPCIEC_NVME_PF_LOCAL_CTRL_REG_BASE + 0x11D0) /* SQ Ring tail doorbell */
#define HiPCIECTRL40V200_HIPCIEC_NVME_PF_LOCAL_CTRL_REG_SQTDBL_59_REG          (HiPCIECTRL40V200_HIPCIEC_NVME_PF_LOCAL_CTRL_REG_BASE + 0x11D8) /* SQ Ring tail doorbell */
#define HiPCIECTRL40V200_HIPCIEC_NVME_PF_LOCAL_CTRL_REG_SQTDBL_60_REG          (HiPCIECTRL40V200_HIPCIEC_NVME_PF_LOCAL_CTRL_REG_BASE + 0x11E0) /* SQ Ring tail doorbell */
#define HiPCIECTRL40V200_HIPCIEC_NVME_PF_LOCAL_CTRL_REG_SQTDBL_61_REG          (HiPCIECTRL40V200_HIPCIEC_NVME_PF_LOCAL_CTRL_REG_BASE + 0x11E8) /* SQ Ring tail doorbell */
#define HiPCIECTRL40V200_HIPCIEC_NVME_PF_LOCAL_CTRL_REG_SQTDBL_62_REG          (HiPCIECTRL40V200_HIPCIEC_NVME_PF_LOCAL_CTRL_REG_BASE + 0x11F0) /* SQ Ring tail doorbell */
#define HiPCIECTRL40V200_HIPCIEC_NVME_PF_LOCAL_CTRL_REG_SQTDBL_63_REG          (HiPCIECTRL40V200_HIPCIEC_NVME_PF_LOCAL_CTRL_REG_BASE + 0x11F8) /* SQ Ring tail doorbell */
#define HiPCIECTRL40V200_HIPCIEC_NVME_PF_LOCAL_CTRL_REG_SQTDBL_64_REG          (HiPCIECTRL40V200_HIPCIEC_NVME_PF_LOCAL_CTRL_REG_BASE + 0x1200) /* SQ Ring tail doorbell */
#define HiPCIECTRL40V200_HIPCIEC_NVME_PF_LOCAL_CTRL_REG_SQTDBL_65_REG          (HiPCIECTRL40V200_HIPCIEC_NVME_PF_LOCAL_CTRL_REG_BASE + 0x1208) /* SQ Ring tail doorbell */
#define HiPCIECTRL40V200_HIPCIEC_NVME_PF_LOCAL_CTRL_REG_SQTDBL_66_REG          (HiPCIECTRL40V200_HIPCIEC_NVME_PF_LOCAL_CTRL_REG_BASE + 0x1210) /* SQ Ring tail doorbell */
#define HiPCIECTRL40V200_HIPCIEC_NVME_PF_LOCAL_CTRL_REG_SQTDBL_67_REG          (HiPCIECTRL40V200_HIPCIEC_NVME_PF_LOCAL_CTRL_REG_BASE + 0x1218) /* SQ Ring tail doorbell */
#define HiPCIECTRL40V200_HIPCIEC_NVME_PF_LOCAL_CTRL_REG_SQTDBL_68_REG          (HiPCIECTRL40V200_HIPCIEC_NVME_PF_LOCAL_CTRL_REG_BASE + 0x1220) /* SQ Ring tail doorbell */
#define HiPCIECTRL40V200_HIPCIEC_NVME_PF_LOCAL_CTRL_REG_SQTDBL_69_REG          (HiPCIECTRL40V200_HIPCIEC_NVME_PF_LOCAL_CTRL_REG_BASE + 0x1228) /* SQ Ring tail doorbell */
#define HiPCIECTRL40V200_HIPCIEC_NVME_PF_LOCAL_CTRL_REG_SQTDBL_70_REG          (HiPCIECTRL40V200_HIPCIEC_NVME_PF_LOCAL_CTRL_REG_BASE + 0x1230) /* SQ Ring tail doorbell */
#define HiPCIECTRL40V200_HIPCIEC_NVME_PF_LOCAL_CTRL_REG_SQTDBL_71_REG          (HiPCIECTRL40V200_HIPCIEC_NVME_PF_LOCAL_CTRL_REG_BASE + 0x1238) /* SQ Ring tail doorbell */
#define HiPCIECTRL40V200_HIPCIEC_NVME_PF_LOCAL_CTRL_REG_SQTDBL_72_REG          (HiPCIECTRL40V200_HIPCIEC_NVME_PF_LOCAL_CTRL_REG_BASE + 0x1240) /* SQ Ring tail doorbell */
#define HiPCIECTRL40V200_HIPCIEC_NVME_PF_LOCAL_CTRL_REG_SQTDBL_73_REG          (HiPCIECTRL40V200_HIPCIEC_NVME_PF_LOCAL_CTRL_REG_BASE + 0x1248) /* SQ Ring tail doorbell */
#define HiPCIECTRL40V200_HIPCIEC_NVME_PF_LOCAL_CTRL_REG_SQTDBL_74_REG          (HiPCIECTRL40V200_HIPCIEC_NVME_PF_LOCAL_CTRL_REG_BASE + 0x1250) /* SQ Ring tail doorbell */
#define HiPCIECTRL40V200_HIPCIEC_NVME_PF_LOCAL_CTRL_REG_SQTDBL_75_REG          (HiPCIECTRL40V200_HIPCIEC_NVME_PF_LOCAL_CTRL_REG_BASE + 0x1258) /* SQ Ring tail doorbell */
#define HiPCIECTRL40V200_HIPCIEC_NVME_PF_LOCAL_CTRL_REG_SQTDBL_76_REG          (HiPCIECTRL40V200_HIPCIEC_NVME_PF_LOCAL_CTRL_REG_BASE + 0x1260) /* SQ Ring tail doorbell */
#define HiPCIECTRL40V200_HIPCIEC_NVME_PF_LOCAL_CTRL_REG_SQTDBL_77_REG          (HiPCIECTRL40V200_HIPCIEC_NVME_PF_LOCAL_CTRL_REG_BASE + 0x1268) /* SQ Ring tail doorbell */
#define HiPCIECTRL40V200_HIPCIEC_NVME_PF_LOCAL_CTRL_REG_SQTDBL_78_REG          (HiPCIECTRL40V200_HIPCIEC_NVME_PF_LOCAL_CTRL_REG_BASE + 0x1270) /* SQ Ring tail doorbell */
#define HiPCIECTRL40V200_HIPCIEC_NVME_PF_LOCAL_CTRL_REG_SQTDBL_79_REG          (HiPCIECTRL40V200_HIPCIEC_NVME_PF_LOCAL_CTRL_REG_BASE + 0x1278) /* SQ Ring tail doorbell */
#define HiPCIECTRL40V200_HIPCIEC_NVME_PF_LOCAL_CTRL_REG_SQTDBL_80_REG          (HiPCIECTRL40V200_HIPCIEC_NVME_PF_LOCAL_CTRL_REG_BASE + 0x1280) /* SQ Ring tail doorbell */
#define HiPCIECTRL40V200_HIPCIEC_NVME_PF_LOCAL_CTRL_REG_SQTDBL_81_REG          (HiPCIECTRL40V200_HIPCIEC_NVME_PF_LOCAL_CTRL_REG_BASE + 0x1288) /* SQ Ring tail doorbell */
#define HiPCIECTRL40V200_HIPCIEC_NVME_PF_LOCAL_CTRL_REG_SQTDBL_82_REG          (HiPCIECTRL40V200_HIPCIEC_NVME_PF_LOCAL_CTRL_REG_BASE + 0x1290) /* SQ Ring tail doorbell */
#define HiPCIECTRL40V200_HIPCIEC_NVME_PF_LOCAL_CTRL_REG_SQTDBL_83_REG          (HiPCIECTRL40V200_HIPCIEC_NVME_PF_LOCAL_CTRL_REG_BASE + 0x1298) /* SQ Ring tail doorbell */
#define HiPCIECTRL40V200_HIPCIEC_NVME_PF_LOCAL_CTRL_REG_SQTDBL_84_REG          (HiPCIECTRL40V200_HIPCIEC_NVME_PF_LOCAL_CTRL_REG_BASE + 0x12A0) /* SQ Ring tail doorbell */
#define HiPCIECTRL40V200_HIPCIEC_NVME_PF_LOCAL_CTRL_REG_SQTDBL_85_REG          (HiPCIECTRL40V200_HIPCIEC_NVME_PF_LOCAL_CTRL_REG_BASE + 0x12A8) /* SQ Ring tail doorbell */
#define HiPCIECTRL40V200_HIPCIEC_NVME_PF_LOCAL_CTRL_REG_SQTDBL_86_REG          (HiPCIECTRL40V200_HIPCIEC_NVME_PF_LOCAL_CTRL_REG_BASE + 0x12B0) /* SQ Ring tail doorbell */
#define HiPCIECTRL40V200_HIPCIEC_NVME_PF_LOCAL_CTRL_REG_SQTDBL_87_REG          (HiPCIECTRL40V200_HIPCIEC_NVME_PF_LOCAL_CTRL_REG_BASE + 0x12B8) /* SQ Ring tail doorbell */
#define HiPCIECTRL40V200_HIPCIEC_NVME_PF_LOCAL_CTRL_REG_SQTDBL_88_REG          (HiPCIECTRL40V200_HIPCIEC_NVME_PF_LOCAL_CTRL_REG_BASE + 0x12C0) /* SQ Ring tail doorbell */
#define HiPCIECTRL40V200_HIPCIEC_NVME_PF_LOCAL_CTRL_REG_SQTDBL_89_REG          (HiPCIECTRL40V200_HIPCIEC_NVME_PF_LOCAL_CTRL_REG_BASE + 0x12C8) /* SQ Ring tail doorbell */
#define HiPCIECTRL40V200_HIPCIEC_NVME_PF_LOCAL_CTRL_REG_SQTDBL_90_REG          (HiPCIECTRL40V200_HIPCIEC_NVME_PF_LOCAL_CTRL_REG_BASE + 0x12D0) /* SQ Ring tail doorbell */
#define HiPCIECTRL40V200_HIPCIEC_NVME_PF_LOCAL_CTRL_REG_SQTDBL_91_REG          (HiPCIECTRL40V200_HIPCIEC_NVME_PF_LOCAL_CTRL_REG_BASE + 0x12D8) /* SQ Ring tail doorbell */
#define HiPCIECTRL40V200_HIPCIEC_NVME_PF_LOCAL_CTRL_REG_SQTDBL_92_REG          (HiPCIECTRL40V200_HIPCIEC_NVME_PF_LOCAL_CTRL_REG_BASE + 0x12E0) /* SQ Ring tail doorbell */
#define HiPCIECTRL40V200_HIPCIEC_NVME_PF_LOCAL_CTRL_REG_SQTDBL_93_REG          (HiPCIECTRL40V200_HIPCIEC_NVME_PF_LOCAL_CTRL_REG_BASE + 0x12E8) /* SQ Ring tail doorbell */
#define HiPCIECTRL40V200_HIPCIEC_NVME_PF_LOCAL_CTRL_REG_SQTDBL_94_REG          (HiPCIECTRL40V200_HIPCIEC_NVME_PF_LOCAL_CTRL_REG_BASE + 0x12F0) /* SQ Ring tail doorbell */
#define HiPCIECTRL40V200_HIPCIEC_NVME_PF_LOCAL_CTRL_REG_SQTDBL_95_REG          (HiPCIECTRL40V200_HIPCIEC_NVME_PF_LOCAL_CTRL_REG_BASE + 0x12F8) /* SQ Ring tail doorbell */
#define HiPCIECTRL40V200_HIPCIEC_NVME_PF_LOCAL_CTRL_REG_SQTDBL_96_REG          (HiPCIECTRL40V200_HIPCIEC_NVME_PF_LOCAL_CTRL_REG_BASE + 0x1300) /* SQ Ring tail doorbell */
#define HiPCIECTRL40V200_HIPCIEC_NVME_PF_LOCAL_CTRL_REG_SQTDBL_97_REG          (HiPCIECTRL40V200_HIPCIEC_NVME_PF_LOCAL_CTRL_REG_BASE + 0x1308) /* SQ Ring tail doorbell */
#define HiPCIECTRL40V200_HIPCIEC_NVME_PF_LOCAL_CTRL_REG_SQTDBL_98_REG          (HiPCIECTRL40V200_HIPCIEC_NVME_PF_LOCAL_CTRL_REG_BASE + 0x1310) /* SQ Ring tail doorbell */
#define HiPCIECTRL40V200_HIPCIEC_NVME_PF_LOCAL_CTRL_REG_SQTDBL_99_REG          (HiPCIECTRL40V200_HIPCIEC_NVME_PF_LOCAL_CTRL_REG_BASE + 0x1318) /* SQ Ring tail doorbell */
#define HiPCIECTRL40V200_HIPCIEC_NVME_PF_LOCAL_CTRL_REG_SQTDBL_100_REG         (HiPCIECTRL40V200_HIPCIEC_NVME_PF_LOCAL_CTRL_REG_BASE + 0x1320) /* SQ Ring tail doorbell */
#define HiPCIECTRL40V200_HIPCIEC_NVME_PF_LOCAL_CTRL_REG_SQTDBL_101_REG         (HiPCIECTRL40V200_HIPCIEC_NVME_PF_LOCAL_CTRL_REG_BASE + 0x1328) /* SQ Ring tail doorbell */
#define HiPCIECTRL40V200_HIPCIEC_NVME_PF_LOCAL_CTRL_REG_SQTDBL_102_REG         (HiPCIECTRL40V200_HIPCIEC_NVME_PF_LOCAL_CTRL_REG_BASE + 0x1330) /* SQ Ring tail doorbell */
#define HiPCIECTRL40V200_HIPCIEC_NVME_PF_LOCAL_CTRL_REG_SQTDBL_103_REG         (HiPCIECTRL40V200_HIPCIEC_NVME_PF_LOCAL_CTRL_REG_BASE + 0x1338) /* SQ Ring tail doorbell */
#define HiPCIECTRL40V200_HIPCIEC_NVME_PF_LOCAL_CTRL_REG_SQTDBL_104_REG         (HiPCIECTRL40V200_HIPCIEC_NVME_PF_LOCAL_CTRL_REG_BASE + 0x1340) /* SQ Ring tail doorbell */
#define HiPCIECTRL40V200_HIPCIEC_NVME_PF_LOCAL_CTRL_REG_SQTDBL_105_REG         (HiPCIECTRL40V200_HIPCIEC_NVME_PF_LOCAL_CTRL_REG_BASE + 0x1348) /* SQ Ring tail doorbell */
#define HiPCIECTRL40V200_HIPCIEC_NVME_PF_LOCAL_CTRL_REG_SQTDBL_106_REG         (HiPCIECTRL40V200_HIPCIEC_NVME_PF_LOCAL_CTRL_REG_BASE + 0x1350) /* SQ Ring tail doorbell */
#define HiPCIECTRL40V200_HIPCIEC_NVME_PF_LOCAL_CTRL_REG_SQTDBL_107_REG         (HiPCIECTRL40V200_HIPCIEC_NVME_PF_LOCAL_CTRL_REG_BASE + 0x1358) /* SQ Ring tail doorbell */
#define HiPCIECTRL40V200_HIPCIEC_NVME_PF_LOCAL_CTRL_REG_SQTDBL_108_REG         (HiPCIECTRL40V200_HIPCIEC_NVME_PF_LOCAL_CTRL_REG_BASE + 0x1360) /* SQ Ring tail doorbell */
#define HiPCIECTRL40V200_HIPCIEC_NVME_PF_LOCAL_CTRL_REG_SQTDBL_109_REG         (HiPCIECTRL40V200_HIPCIEC_NVME_PF_LOCAL_CTRL_REG_BASE + 0x1368) /* SQ Ring tail doorbell */
#define HiPCIECTRL40V200_HIPCIEC_NVME_PF_LOCAL_CTRL_REG_SQTDBL_110_REG         (HiPCIECTRL40V200_HIPCIEC_NVME_PF_LOCAL_CTRL_REG_BASE + 0x1370) /* SQ Ring tail doorbell */
#define HiPCIECTRL40V200_HIPCIEC_NVME_PF_LOCAL_CTRL_REG_SQTDBL_111_REG         (HiPCIECTRL40V200_HIPCIEC_NVME_PF_LOCAL_CTRL_REG_BASE + 0x1378) /* SQ Ring tail doorbell */
#define HiPCIECTRL40V200_HIPCIEC_NVME_PF_LOCAL_CTRL_REG_SQTDBL_112_REG         (HiPCIECTRL40V200_HIPCIEC_NVME_PF_LOCAL_CTRL_REG_BASE + 0x1380) /* SQ Ring tail doorbell */
#define HiPCIECTRL40V200_HIPCIEC_NVME_PF_LOCAL_CTRL_REG_SQTDBL_113_REG         (HiPCIECTRL40V200_HIPCIEC_NVME_PF_LOCAL_CTRL_REG_BASE + 0x1388) /* SQ Ring tail doorbell */
#define HiPCIECTRL40V200_HIPCIEC_NVME_PF_LOCAL_CTRL_REG_SQTDBL_114_REG         (HiPCIECTRL40V200_HIPCIEC_NVME_PF_LOCAL_CTRL_REG_BASE + 0x1390) /* SQ Ring tail doorbell */
#define HiPCIECTRL40V200_HIPCIEC_NVME_PF_LOCAL_CTRL_REG_SQTDBL_115_REG         (HiPCIECTRL40V200_HIPCIEC_NVME_PF_LOCAL_CTRL_REG_BASE + 0x1398) /* SQ Ring tail doorbell */
#define HiPCIECTRL40V200_HIPCIEC_NVME_PF_LOCAL_CTRL_REG_SQTDBL_116_REG         (HiPCIECTRL40V200_HIPCIEC_NVME_PF_LOCAL_CTRL_REG_BASE + 0x13A0) /* SQ Ring tail doorbell */
#define HiPCIECTRL40V200_HIPCIEC_NVME_PF_LOCAL_CTRL_REG_SQTDBL_117_REG         (HiPCIECTRL40V200_HIPCIEC_NVME_PF_LOCAL_CTRL_REG_BASE + 0x13A8) /* SQ Ring tail doorbell */
#define HiPCIECTRL40V200_HIPCIEC_NVME_PF_LOCAL_CTRL_REG_SQTDBL_118_REG         (HiPCIECTRL40V200_HIPCIEC_NVME_PF_LOCAL_CTRL_REG_BASE + 0x13B0) /* SQ Ring tail doorbell */
#define HiPCIECTRL40V200_HIPCIEC_NVME_PF_LOCAL_CTRL_REG_SQTDBL_119_REG         (HiPCIECTRL40V200_HIPCIEC_NVME_PF_LOCAL_CTRL_REG_BASE + 0x13B8) /* SQ Ring tail doorbell */
#define HiPCIECTRL40V200_HIPCIEC_NVME_PF_LOCAL_CTRL_REG_SQTDBL_120_REG         (HiPCIECTRL40V200_HIPCIEC_NVME_PF_LOCAL_CTRL_REG_BASE + 0x13C0) /* SQ Ring tail doorbell */
#define HiPCIECTRL40V200_HIPCIEC_NVME_PF_LOCAL_CTRL_REG_SQTDBL_121_REG         (HiPCIECTRL40V200_HIPCIEC_NVME_PF_LOCAL_CTRL_REG_BASE + 0x13C8) /* SQ Ring tail doorbell */
#define HiPCIECTRL40V200_HIPCIEC_NVME_PF_LOCAL_CTRL_REG_SQTDBL_122_REG         (HiPCIECTRL40V200_HIPCIEC_NVME_PF_LOCAL_CTRL_REG_BASE + 0x13D0) /* SQ Ring tail doorbell */
#define HiPCIECTRL40V200_HIPCIEC_NVME_PF_LOCAL_CTRL_REG_SQTDBL_123_REG         (HiPCIECTRL40V200_HIPCIEC_NVME_PF_LOCAL_CTRL_REG_BASE + 0x13D8) /* SQ Ring tail doorbell */
#define HiPCIECTRL40V200_HIPCIEC_NVME_PF_LOCAL_CTRL_REG_SQTDBL_124_REG         (HiPCIECTRL40V200_HIPCIEC_NVME_PF_LOCAL_CTRL_REG_BASE + 0x13E0) /* SQ Ring tail doorbell */
#define HiPCIECTRL40V200_HIPCIEC_NVME_PF_LOCAL_CTRL_REG_SQTDBL_125_REG         (HiPCIECTRL40V200_HIPCIEC_NVME_PF_LOCAL_CTRL_REG_BASE + 0x13E8) /* SQ Ring tail doorbell */
#define HiPCIECTRL40V200_HIPCIEC_NVME_PF_LOCAL_CTRL_REG_SQTDBL_126_REG         (HiPCIECTRL40V200_HIPCIEC_NVME_PF_LOCAL_CTRL_REG_BASE + 0x13F0) /* SQ Ring tail doorbell */
#define HiPCIECTRL40V200_HIPCIEC_NVME_PF_LOCAL_CTRL_REG_SQTDBL_127_REG         (HiPCIECTRL40V200_HIPCIEC_NVME_PF_LOCAL_CTRL_REG_BASE + 0x13F8) /* SQ Ring tail doorbell */
#define HiPCIECTRL40V200_HIPCIEC_NVME_PF_LOCAL_CTRL_REG_CQHDBL_0_REG           (HiPCIECTRL40V200_HIPCIEC_NVME_PF_LOCAL_CTRL_REG_BASE + 0x1004) /* CQ Ring head doorbell */
#define HiPCIECTRL40V200_HIPCIEC_NVME_PF_LOCAL_CTRL_REG_CQHDBL_1_REG           (HiPCIECTRL40V200_HIPCIEC_NVME_PF_LOCAL_CTRL_REG_BASE + 0x100C) /* CQ Ring head doorbell */
#define HiPCIECTRL40V200_HIPCIEC_NVME_PF_LOCAL_CTRL_REG_CQHDBL_2_REG           (HiPCIECTRL40V200_HIPCIEC_NVME_PF_LOCAL_CTRL_REG_BASE + 0x1014) /* CQ Ring head doorbell */
#define HiPCIECTRL40V200_HIPCIEC_NVME_PF_LOCAL_CTRL_REG_CQHDBL_3_REG           (HiPCIECTRL40V200_HIPCIEC_NVME_PF_LOCAL_CTRL_REG_BASE + 0x101C) /* CQ Ring head doorbell */
#define HiPCIECTRL40V200_HIPCIEC_NVME_PF_LOCAL_CTRL_REG_CQHDBL_4_REG           (HiPCIECTRL40V200_HIPCIEC_NVME_PF_LOCAL_CTRL_REG_BASE + 0x1024) /* CQ Ring head doorbell */
#define HiPCIECTRL40V200_HIPCIEC_NVME_PF_LOCAL_CTRL_REG_CQHDBL_5_REG           (HiPCIECTRL40V200_HIPCIEC_NVME_PF_LOCAL_CTRL_REG_BASE + 0x102C) /* CQ Ring head doorbell */
#define HiPCIECTRL40V200_HIPCIEC_NVME_PF_LOCAL_CTRL_REG_CQHDBL_6_REG           (HiPCIECTRL40V200_HIPCIEC_NVME_PF_LOCAL_CTRL_REG_BASE + 0x1034) /* CQ Ring head doorbell */
#define HiPCIECTRL40V200_HIPCIEC_NVME_PF_LOCAL_CTRL_REG_CQHDBL_7_REG           (HiPCIECTRL40V200_HIPCIEC_NVME_PF_LOCAL_CTRL_REG_BASE + 0x103C) /* CQ Ring head doorbell */
#define HiPCIECTRL40V200_HIPCIEC_NVME_PF_LOCAL_CTRL_REG_CQHDBL_8_REG           (HiPCIECTRL40V200_HIPCIEC_NVME_PF_LOCAL_CTRL_REG_BASE + 0x1044) /* CQ Ring head doorbell */
#define HiPCIECTRL40V200_HIPCIEC_NVME_PF_LOCAL_CTRL_REG_CQHDBL_9_REG           (HiPCIECTRL40V200_HIPCIEC_NVME_PF_LOCAL_CTRL_REG_BASE + 0x104C) /* CQ Ring head doorbell */
#define HiPCIECTRL40V200_HIPCIEC_NVME_PF_LOCAL_CTRL_REG_CQHDBL_10_REG          (HiPCIECTRL40V200_HIPCIEC_NVME_PF_LOCAL_CTRL_REG_BASE + 0x1054) /* CQ Ring head doorbell */
#define HiPCIECTRL40V200_HIPCIEC_NVME_PF_LOCAL_CTRL_REG_CQHDBL_11_REG          (HiPCIECTRL40V200_HIPCIEC_NVME_PF_LOCAL_CTRL_REG_BASE + 0x105C) /* CQ Ring head doorbell */
#define HiPCIECTRL40V200_HIPCIEC_NVME_PF_LOCAL_CTRL_REG_CQHDBL_12_REG          (HiPCIECTRL40V200_HIPCIEC_NVME_PF_LOCAL_CTRL_REG_BASE + 0x1064) /* CQ Ring head doorbell */
#define HiPCIECTRL40V200_HIPCIEC_NVME_PF_LOCAL_CTRL_REG_CQHDBL_13_REG          (HiPCIECTRL40V200_HIPCIEC_NVME_PF_LOCAL_CTRL_REG_BASE + 0x106C) /* CQ Ring head doorbell */
#define HiPCIECTRL40V200_HIPCIEC_NVME_PF_LOCAL_CTRL_REG_CQHDBL_14_REG          (HiPCIECTRL40V200_HIPCIEC_NVME_PF_LOCAL_CTRL_REG_BASE + 0x1074) /* CQ Ring head doorbell */
#define HiPCIECTRL40V200_HIPCIEC_NVME_PF_LOCAL_CTRL_REG_CQHDBL_15_REG          (HiPCIECTRL40V200_HIPCIEC_NVME_PF_LOCAL_CTRL_REG_BASE + 0x107C) /* CQ Ring head doorbell */
#define HiPCIECTRL40V200_HIPCIEC_NVME_PF_LOCAL_CTRL_REG_CQHDBL_16_REG          (HiPCIECTRL40V200_HIPCIEC_NVME_PF_LOCAL_CTRL_REG_BASE + 0x1084) /* CQ Ring head doorbell */
#define HiPCIECTRL40V200_HIPCIEC_NVME_PF_LOCAL_CTRL_REG_CQHDBL_17_REG          (HiPCIECTRL40V200_HIPCIEC_NVME_PF_LOCAL_CTRL_REG_BASE + 0x108C) /* CQ Ring head doorbell */
#define HiPCIECTRL40V200_HIPCIEC_NVME_PF_LOCAL_CTRL_REG_CQHDBL_18_REG          (HiPCIECTRL40V200_HIPCIEC_NVME_PF_LOCAL_CTRL_REG_BASE + 0x1094) /* CQ Ring head doorbell */
#define HiPCIECTRL40V200_HIPCIEC_NVME_PF_LOCAL_CTRL_REG_CQHDBL_19_REG          (HiPCIECTRL40V200_HIPCIEC_NVME_PF_LOCAL_CTRL_REG_BASE + 0x109C) /* CQ Ring head doorbell */
#define HiPCIECTRL40V200_HIPCIEC_NVME_PF_LOCAL_CTRL_REG_CQHDBL_20_REG          (HiPCIECTRL40V200_HIPCIEC_NVME_PF_LOCAL_CTRL_REG_BASE + 0x10A4) /* CQ Ring head doorbell */
#define HiPCIECTRL40V200_HIPCIEC_NVME_PF_LOCAL_CTRL_REG_CQHDBL_21_REG          (HiPCIECTRL40V200_HIPCIEC_NVME_PF_LOCAL_CTRL_REG_BASE + 0x10AC) /* CQ Ring head doorbell */
#define HiPCIECTRL40V200_HIPCIEC_NVME_PF_LOCAL_CTRL_REG_CQHDBL_22_REG          (HiPCIECTRL40V200_HIPCIEC_NVME_PF_LOCAL_CTRL_REG_BASE + 0x10B4) /* CQ Ring head doorbell */
#define HiPCIECTRL40V200_HIPCIEC_NVME_PF_LOCAL_CTRL_REG_CQHDBL_23_REG          (HiPCIECTRL40V200_HIPCIEC_NVME_PF_LOCAL_CTRL_REG_BASE + 0x10BC) /* CQ Ring head doorbell */
#define HiPCIECTRL40V200_HIPCIEC_NVME_PF_LOCAL_CTRL_REG_CQHDBL_24_REG          (HiPCIECTRL40V200_HIPCIEC_NVME_PF_LOCAL_CTRL_REG_BASE + 0x10C4) /* CQ Ring head doorbell */
#define HiPCIECTRL40V200_HIPCIEC_NVME_PF_LOCAL_CTRL_REG_CQHDBL_25_REG          (HiPCIECTRL40V200_HIPCIEC_NVME_PF_LOCAL_CTRL_REG_BASE + 0x10CC) /* CQ Ring head doorbell */
#define HiPCIECTRL40V200_HIPCIEC_NVME_PF_LOCAL_CTRL_REG_CQHDBL_26_REG          (HiPCIECTRL40V200_HIPCIEC_NVME_PF_LOCAL_CTRL_REG_BASE + 0x10D4) /* CQ Ring head doorbell */
#define HiPCIECTRL40V200_HIPCIEC_NVME_PF_LOCAL_CTRL_REG_CQHDBL_27_REG          (HiPCIECTRL40V200_HIPCIEC_NVME_PF_LOCAL_CTRL_REG_BASE + 0x10DC) /* CQ Ring head doorbell */
#define HiPCIECTRL40V200_HIPCIEC_NVME_PF_LOCAL_CTRL_REG_CQHDBL_28_REG          (HiPCIECTRL40V200_HIPCIEC_NVME_PF_LOCAL_CTRL_REG_BASE + 0x10E4) /* CQ Ring head doorbell */
#define HiPCIECTRL40V200_HIPCIEC_NVME_PF_LOCAL_CTRL_REG_CQHDBL_29_REG          (HiPCIECTRL40V200_HIPCIEC_NVME_PF_LOCAL_CTRL_REG_BASE + 0x10EC) /* CQ Ring head doorbell */
#define HiPCIECTRL40V200_HIPCIEC_NVME_PF_LOCAL_CTRL_REG_CQHDBL_30_REG          (HiPCIECTRL40V200_HIPCIEC_NVME_PF_LOCAL_CTRL_REG_BASE + 0x10F4) /* CQ Ring head doorbell */
#define HiPCIECTRL40V200_HIPCIEC_NVME_PF_LOCAL_CTRL_REG_CQHDBL_31_REG          (HiPCIECTRL40V200_HIPCIEC_NVME_PF_LOCAL_CTRL_REG_BASE + 0x10FC) /* CQ Ring head doorbell */
#define HiPCIECTRL40V200_HIPCIEC_NVME_PF_LOCAL_CTRL_REG_CQHDBL_32_REG          (HiPCIECTRL40V200_HIPCIEC_NVME_PF_LOCAL_CTRL_REG_BASE + 0x1104) /* CQ Ring head doorbell */
#define HiPCIECTRL40V200_HIPCIEC_NVME_PF_LOCAL_CTRL_REG_CQHDBL_33_REG          (HiPCIECTRL40V200_HIPCIEC_NVME_PF_LOCAL_CTRL_REG_BASE + 0x110C) /* CQ Ring head doorbell */
#define HiPCIECTRL40V200_HIPCIEC_NVME_PF_LOCAL_CTRL_REG_CQHDBL_34_REG          (HiPCIECTRL40V200_HIPCIEC_NVME_PF_LOCAL_CTRL_REG_BASE + 0x1114) /* CQ Ring head doorbell */
#define HiPCIECTRL40V200_HIPCIEC_NVME_PF_LOCAL_CTRL_REG_CQHDBL_35_REG          (HiPCIECTRL40V200_HIPCIEC_NVME_PF_LOCAL_CTRL_REG_BASE + 0x111C) /* CQ Ring head doorbell */
#define HiPCIECTRL40V200_HIPCIEC_NVME_PF_LOCAL_CTRL_REG_CQHDBL_36_REG          (HiPCIECTRL40V200_HIPCIEC_NVME_PF_LOCAL_CTRL_REG_BASE + 0x1124) /* CQ Ring head doorbell */
#define HiPCIECTRL40V200_HIPCIEC_NVME_PF_LOCAL_CTRL_REG_CQHDBL_37_REG          (HiPCIECTRL40V200_HIPCIEC_NVME_PF_LOCAL_CTRL_REG_BASE + 0x112C) /* CQ Ring head doorbell */
#define HiPCIECTRL40V200_HIPCIEC_NVME_PF_LOCAL_CTRL_REG_CQHDBL_38_REG          (HiPCIECTRL40V200_HIPCIEC_NVME_PF_LOCAL_CTRL_REG_BASE + 0x1134) /* CQ Ring head doorbell */
#define HiPCIECTRL40V200_HIPCIEC_NVME_PF_LOCAL_CTRL_REG_CQHDBL_39_REG          (HiPCIECTRL40V200_HIPCIEC_NVME_PF_LOCAL_CTRL_REG_BASE + 0x113C) /* CQ Ring head doorbell */
#define HiPCIECTRL40V200_HIPCIEC_NVME_PF_LOCAL_CTRL_REG_CQHDBL_40_REG          (HiPCIECTRL40V200_HIPCIEC_NVME_PF_LOCAL_CTRL_REG_BASE + 0x1144) /* CQ Ring head doorbell */
#define HiPCIECTRL40V200_HIPCIEC_NVME_PF_LOCAL_CTRL_REG_CQHDBL_41_REG          (HiPCIECTRL40V200_HIPCIEC_NVME_PF_LOCAL_CTRL_REG_BASE + 0x114C) /* CQ Ring head doorbell */
#define HiPCIECTRL40V200_HIPCIEC_NVME_PF_LOCAL_CTRL_REG_CQHDBL_42_REG          (HiPCIECTRL40V200_HIPCIEC_NVME_PF_LOCAL_CTRL_REG_BASE + 0x1154) /* CQ Ring head doorbell */
#define HiPCIECTRL40V200_HIPCIEC_NVME_PF_LOCAL_CTRL_REG_CQHDBL_43_REG          (HiPCIECTRL40V200_HIPCIEC_NVME_PF_LOCAL_CTRL_REG_BASE + 0x115C) /* CQ Ring head doorbell */
#define HiPCIECTRL40V200_HIPCIEC_NVME_PF_LOCAL_CTRL_REG_CQHDBL_44_REG          (HiPCIECTRL40V200_HIPCIEC_NVME_PF_LOCAL_CTRL_REG_BASE + 0x1164) /* CQ Ring head doorbell */
#define HiPCIECTRL40V200_HIPCIEC_NVME_PF_LOCAL_CTRL_REG_CQHDBL_45_REG          (HiPCIECTRL40V200_HIPCIEC_NVME_PF_LOCAL_CTRL_REG_BASE + 0x116C) /* CQ Ring head doorbell */
#define HiPCIECTRL40V200_HIPCIEC_NVME_PF_LOCAL_CTRL_REG_CQHDBL_46_REG          (HiPCIECTRL40V200_HIPCIEC_NVME_PF_LOCAL_CTRL_REG_BASE + 0x1174) /* CQ Ring head doorbell */
#define HiPCIECTRL40V200_HIPCIEC_NVME_PF_LOCAL_CTRL_REG_CQHDBL_47_REG          (HiPCIECTRL40V200_HIPCIEC_NVME_PF_LOCAL_CTRL_REG_BASE + 0x117C) /* CQ Ring head doorbell */
#define HiPCIECTRL40V200_HIPCIEC_NVME_PF_LOCAL_CTRL_REG_CQHDBL_48_REG          (HiPCIECTRL40V200_HIPCIEC_NVME_PF_LOCAL_CTRL_REG_BASE + 0x1184) /* CQ Ring head doorbell */
#define HiPCIECTRL40V200_HIPCIEC_NVME_PF_LOCAL_CTRL_REG_CQHDBL_49_REG          (HiPCIECTRL40V200_HIPCIEC_NVME_PF_LOCAL_CTRL_REG_BASE + 0x118C) /* CQ Ring head doorbell */
#define HiPCIECTRL40V200_HIPCIEC_NVME_PF_LOCAL_CTRL_REG_CQHDBL_50_REG          (HiPCIECTRL40V200_HIPCIEC_NVME_PF_LOCAL_CTRL_REG_BASE + 0x1194) /* CQ Ring head doorbell */
#define HiPCIECTRL40V200_HIPCIEC_NVME_PF_LOCAL_CTRL_REG_CQHDBL_51_REG          (HiPCIECTRL40V200_HIPCIEC_NVME_PF_LOCAL_CTRL_REG_BASE + 0x119C) /* CQ Ring head doorbell */
#define HiPCIECTRL40V200_HIPCIEC_NVME_PF_LOCAL_CTRL_REG_CQHDBL_52_REG          (HiPCIECTRL40V200_HIPCIEC_NVME_PF_LOCAL_CTRL_REG_BASE + 0x11A4) /* CQ Ring head doorbell */
#define HiPCIECTRL40V200_HIPCIEC_NVME_PF_LOCAL_CTRL_REG_CQHDBL_53_REG          (HiPCIECTRL40V200_HIPCIEC_NVME_PF_LOCAL_CTRL_REG_BASE + 0x11AC) /* CQ Ring head doorbell */
#define HiPCIECTRL40V200_HIPCIEC_NVME_PF_LOCAL_CTRL_REG_CQHDBL_54_REG          (HiPCIECTRL40V200_HIPCIEC_NVME_PF_LOCAL_CTRL_REG_BASE + 0x11B4) /* CQ Ring head doorbell */
#define HiPCIECTRL40V200_HIPCIEC_NVME_PF_LOCAL_CTRL_REG_CQHDBL_55_REG          (HiPCIECTRL40V200_HIPCIEC_NVME_PF_LOCAL_CTRL_REG_BASE + 0x11BC) /* CQ Ring head doorbell */
#define HiPCIECTRL40V200_HIPCIEC_NVME_PF_LOCAL_CTRL_REG_CQHDBL_56_REG          (HiPCIECTRL40V200_HIPCIEC_NVME_PF_LOCAL_CTRL_REG_BASE + 0x11C4) /* CQ Ring head doorbell */
#define HiPCIECTRL40V200_HIPCIEC_NVME_PF_LOCAL_CTRL_REG_CQHDBL_57_REG          (HiPCIECTRL40V200_HIPCIEC_NVME_PF_LOCAL_CTRL_REG_BASE + 0x11CC) /* CQ Ring head doorbell */
#define HiPCIECTRL40V200_HIPCIEC_NVME_PF_LOCAL_CTRL_REG_CQHDBL_58_REG          (HiPCIECTRL40V200_HIPCIEC_NVME_PF_LOCAL_CTRL_REG_BASE + 0x11D4) /* CQ Ring head doorbell */
#define HiPCIECTRL40V200_HIPCIEC_NVME_PF_LOCAL_CTRL_REG_CQHDBL_59_REG          (HiPCIECTRL40V200_HIPCIEC_NVME_PF_LOCAL_CTRL_REG_BASE + 0x11DC) /* CQ Ring head doorbell */
#define HiPCIECTRL40V200_HIPCIEC_NVME_PF_LOCAL_CTRL_REG_CQHDBL_60_REG          (HiPCIECTRL40V200_HIPCIEC_NVME_PF_LOCAL_CTRL_REG_BASE + 0x11E4) /* CQ Ring head doorbell */
#define HiPCIECTRL40V200_HIPCIEC_NVME_PF_LOCAL_CTRL_REG_CQHDBL_61_REG          (HiPCIECTRL40V200_HIPCIEC_NVME_PF_LOCAL_CTRL_REG_BASE + 0x11EC) /* CQ Ring head doorbell */
#define HiPCIECTRL40V200_HIPCIEC_NVME_PF_LOCAL_CTRL_REG_CQHDBL_62_REG          (HiPCIECTRL40V200_HIPCIEC_NVME_PF_LOCAL_CTRL_REG_BASE + 0x11F4) /* CQ Ring head doorbell */
#define HiPCIECTRL40V200_HIPCIEC_NVME_PF_LOCAL_CTRL_REG_CQHDBL_63_REG          (HiPCIECTRL40V200_HIPCIEC_NVME_PF_LOCAL_CTRL_REG_BASE + 0x11FC) /* CQ Ring head doorbell */
#define HiPCIECTRL40V200_HIPCIEC_NVME_PF_LOCAL_CTRL_REG_CQHDBL_64_REG          (HiPCIECTRL40V200_HIPCIEC_NVME_PF_LOCAL_CTRL_REG_BASE + 0x1204) /* CQ Ring head doorbell */
#define HiPCIECTRL40V200_HIPCIEC_NVME_PF_LOCAL_CTRL_REG_CQHDBL_65_REG          (HiPCIECTRL40V200_HIPCIEC_NVME_PF_LOCAL_CTRL_REG_BASE + 0x120C) /* CQ Ring head doorbell */
#define HiPCIECTRL40V200_HIPCIEC_NVME_PF_LOCAL_CTRL_REG_CQHDBL_66_REG          (HiPCIECTRL40V200_HIPCIEC_NVME_PF_LOCAL_CTRL_REG_BASE + 0x1214) /* CQ Ring head doorbell */
#define HiPCIECTRL40V200_HIPCIEC_NVME_PF_LOCAL_CTRL_REG_CQHDBL_67_REG          (HiPCIECTRL40V200_HIPCIEC_NVME_PF_LOCAL_CTRL_REG_BASE + 0x121C) /* CQ Ring head doorbell */
#define HiPCIECTRL40V200_HIPCIEC_NVME_PF_LOCAL_CTRL_REG_CQHDBL_68_REG          (HiPCIECTRL40V200_HIPCIEC_NVME_PF_LOCAL_CTRL_REG_BASE + 0x1224) /* CQ Ring head doorbell */
#define HiPCIECTRL40V200_HIPCIEC_NVME_PF_LOCAL_CTRL_REG_CQHDBL_69_REG          (HiPCIECTRL40V200_HIPCIEC_NVME_PF_LOCAL_CTRL_REG_BASE + 0x122C) /* CQ Ring head doorbell */
#define HiPCIECTRL40V200_HIPCIEC_NVME_PF_LOCAL_CTRL_REG_CQHDBL_70_REG          (HiPCIECTRL40V200_HIPCIEC_NVME_PF_LOCAL_CTRL_REG_BASE + 0x1234) /* CQ Ring head doorbell */
#define HiPCIECTRL40V200_HIPCIEC_NVME_PF_LOCAL_CTRL_REG_CQHDBL_71_REG          (HiPCIECTRL40V200_HIPCIEC_NVME_PF_LOCAL_CTRL_REG_BASE + 0x123C) /* CQ Ring head doorbell */
#define HiPCIECTRL40V200_HIPCIEC_NVME_PF_LOCAL_CTRL_REG_CQHDBL_72_REG          (HiPCIECTRL40V200_HIPCIEC_NVME_PF_LOCAL_CTRL_REG_BASE + 0x1244) /* CQ Ring head doorbell */
#define HiPCIECTRL40V200_HIPCIEC_NVME_PF_LOCAL_CTRL_REG_CQHDBL_73_REG          (HiPCIECTRL40V200_HIPCIEC_NVME_PF_LOCAL_CTRL_REG_BASE + 0x124C) /* CQ Ring head doorbell */
#define HiPCIECTRL40V200_HIPCIEC_NVME_PF_LOCAL_CTRL_REG_CQHDBL_74_REG          (HiPCIECTRL40V200_HIPCIEC_NVME_PF_LOCAL_CTRL_REG_BASE + 0x1254) /* CQ Ring head doorbell */
#define HiPCIECTRL40V200_HIPCIEC_NVME_PF_LOCAL_CTRL_REG_CQHDBL_75_REG          (HiPCIECTRL40V200_HIPCIEC_NVME_PF_LOCAL_CTRL_REG_BASE + 0x125C) /* CQ Ring head doorbell */
#define HiPCIECTRL40V200_HIPCIEC_NVME_PF_LOCAL_CTRL_REG_CQHDBL_76_REG          (HiPCIECTRL40V200_HIPCIEC_NVME_PF_LOCAL_CTRL_REG_BASE + 0x1264) /* CQ Ring head doorbell */
#define HiPCIECTRL40V200_HIPCIEC_NVME_PF_LOCAL_CTRL_REG_CQHDBL_77_REG          (HiPCIECTRL40V200_HIPCIEC_NVME_PF_LOCAL_CTRL_REG_BASE + 0x126C) /* CQ Ring head doorbell */
#define HiPCIECTRL40V200_HIPCIEC_NVME_PF_LOCAL_CTRL_REG_CQHDBL_78_REG          (HiPCIECTRL40V200_HIPCIEC_NVME_PF_LOCAL_CTRL_REG_BASE + 0x1274) /* CQ Ring head doorbell */
#define HiPCIECTRL40V200_HIPCIEC_NVME_PF_LOCAL_CTRL_REG_CQHDBL_79_REG          (HiPCIECTRL40V200_HIPCIEC_NVME_PF_LOCAL_CTRL_REG_BASE + 0x127C) /* CQ Ring head doorbell */
#define HiPCIECTRL40V200_HIPCIEC_NVME_PF_LOCAL_CTRL_REG_CQHDBL_80_REG          (HiPCIECTRL40V200_HIPCIEC_NVME_PF_LOCAL_CTRL_REG_BASE + 0x1284) /* CQ Ring head doorbell */
#define HiPCIECTRL40V200_HIPCIEC_NVME_PF_LOCAL_CTRL_REG_CQHDBL_81_REG          (HiPCIECTRL40V200_HIPCIEC_NVME_PF_LOCAL_CTRL_REG_BASE + 0x128C) /* CQ Ring head doorbell */
#define HiPCIECTRL40V200_HIPCIEC_NVME_PF_LOCAL_CTRL_REG_CQHDBL_82_REG          (HiPCIECTRL40V200_HIPCIEC_NVME_PF_LOCAL_CTRL_REG_BASE + 0x1294) /* CQ Ring head doorbell */
#define HiPCIECTRL40V200_HIPCIEC_NVME_PF_LOCAL_CTRL_REG_CQHDBL_83_REG          (HiPCIECTRL40V200_HIPCIEC_NVME_PF_LOCAL_CTRL_REG_BASE + 0x129C) /* CQ Ring head doorbell */
#define HiPCIECTRL40V200_HIPCIEC_NVME_PF_LOCAL_CTRL_REG_CQHDBL_84_REG          (HiPCIECTRL40V200_HIPCIEC_NVME_PF_LOCAL_CTRL_REG_BASE + 0x12A4) /* CQ Ring head doorbell */
#define HiPCIECTRL40V200_HIPCIEC_NVME_PF_LOCAL_CTRL_REG_CQHDBL_85_REG          (HiPCIECTRL40V200_HIPCIEC_NVME_PF_LOCAL_CTRL_REG_BASE + 0x12AC) /* CQ Ring head doorbell */
#define HiPCIECTRL40V200_HIPCIEC_NVME_PF_LOCAL_CTRL_REG_CQHDBL_86_REG          (HiPCIECTRL40V200_HIPCIEC_NVME_PF_LOCAL_CTRL_REG_BASE + 0x12B4) /* CQ Ring head doorbell */
#define HiPCIECTRL40V200_HIPCIEC_NVME_PF_LOCAL_CTRL_REG_CQHDBL_87_REG          (HiPCIECTRL40V200_HIPCIEC_NVME_PF_LOCAL_CTRL_REG_BASE + 0x12BC) /* CQ Ring head doorbell */
#define HiPCIECTRL40V200_HIPCIEC_NVME_PF_LOCAL_CTRL_REG_CQHDBL_88_REG          (HiPCIECTRL40V200_HIPCIEC_NVME_PF_LOCAL_CTRL_REG_BASE + 0x12C4) /* CQ Ring head doorbell */
#define HiPCIECTRL40V200_HIPCIEC_NVME_PF_LOCAL_CTRL_REG_CQHDBL_89_REG          (HiPCIECTRL40V200_HIPCIEC_NVME_PF_LOCAL_CTRL_REG_BASE + 0x12CC) /* CQ Ring head doorbell */
#define HiPCIECTRL40V200_HIPCIEC_NVME_PF_LOCAL_CTRL_REG_CQHDBL_90_REG          (HiPCIECTRL40V200_HIPCIEC_NVME_PF_LOCAL_CTRL_REG_BASE + 0x12D4) /* CQ Ring head doorbell */
#define HiPCIECTRL40V200_HIPCIEC_NVME_PF_LOCAL_CTRL_REG_CQHDBL_91_REG          (HiPCIECTRL40V200_HIPCIEC_NVME_PF_LOCAL_CTRL_REG_BASE + 0x12DC) /* CQ Ring head doorbell */
#define HiPCIECTRL40V200_HIPCIEC_NVME_PF_LOCAL_CTRL_REG_CQHDBL_92_REG          (HiPCIECTRL40V200_HIPCIEC_NVME_PF_LOCAL_CTRL_REG_BASE + 0x12E4) /* CQ Ring head doorbell */
#define HiPCIECTRL40V200_HIPCIEC_NVME_PF_LOCAL_CTRL_REG_CQHDBL_93_REG          (HiPCIECTRL40V200_HIPCIEC_NVME_PF_LOCAL_CTRL_REG_BASE + 0x12EC) /* CQ Ring head doorbell */
#define HiPCIECTRL40V200_HIPCIEC_NVME_PF_LOCAL_CTRL_REG_CQHDBL_94_REG          (HiPCIECTRL40V200_HIPCIEC_NVME_PF_LOCAL_CTRL_REG_BASE + 0x12F4) /* CQ Ring head doorbell */
#define HiPCIECTRL40V200_HIPCIEC_NVME_PF_LOCAL_CTRL_REG_CQHDBL_95_REG          (HiPCIECTRL40V200_HIPCIEC_NVME_PF_LOCAL_CTRL_REG_BASE + 0x12FC) /* CQ Ring head doorbell */
#define HiPCIECTRL40V200_HIPCIEC_NVME_PF_LOCAL_CTRL_REG_CQHDBL_96_REG          (HiPCIECTRL40V200_HIPCIEC_NVME_PF_LOCAL_CTRL_REG_BASE + 0x1304) /* CQ Ring head doorbell */
#define HiPCIECTRL40V200_HIPCIEC_NVME_PF_LOCAL_CTRL_REG_CQHDBL_97_REG          (HiPCIECTRL40V200_HIPCIEC_NVME_PF_LOCAL_CTRL_REG_BASE + 0x130C) /* CQ Ring head doorbell */
#define HiPCIECTRL40V200_HIPCIEC_NVME_PF_LOCAL_CTRL_REG_CQHDBL_98_REG          (HiPCIECTRL40V200_HIPCIEC_NVME_PF_LOCAL_CTRL_REG_BASE + 0x1314) /* CQ Ring head doorbell */
#define HiPCIECTRL40V200_HIPCIEC_NVME_PF_LOCAL_CTRL_REG_CQHDBL_99_REG          (HiPCIECTRL40V200_HIPCIEC_NVME_PF_LOCAL_CTRL_REG_BASE + 0x131C) /* CQ Ring head doorbell */
#define HiPCIECTRL40V200_HIPCIEC_NVME_PF_LOCAL_CTRL_REG_CQHDBL_100_REG         (HiPCIECTRL40V200_HIPCIEC_NVME_PF_LOCAL_CTRL_REG_BASE + 0x1324) /* CQ Ring head doorbell */
#define HiPCIECTRL40V200_HIPCIEC_NVME_PF_LOCAL_CTRL_REG_CQHDBL_101_REG         (HiPCIECTRL40V200_HIPCIEC_NVME_PF_LOCAL_CTRL_REG_BASE + 0x132C) /* CQ Ring head doorbell */
#define HiPCIECTRL40V200_HIPCIEC_NVME_PF_LOCAL_CTRL_REG_CQHDBL_102_REG         (HiPCIECTRL40V200_HIPCIEC_NVME_PF_LOCAL_CTRL_REG_BASE + 0x1334) /* CQ Ring head doorbell */
#define HiPCIECTRL40V200_HIPCIEC_NVME_PF_LOCAL_CTRL_REG_CQHDBL_103_REG         (HiPCIECTRL40V200_HIPCIEC_NVME_PF_LOCAL_CTRL_REG_BASE + 0x133C) /* CQ Ring head doorbell */
#define HiPCIECTRL40V200_HIPCIEC_NVME_PF_LOCAL_CTRL_REG_CQHDBL_104_REG         (HiPCIECTRL40V200_HIPCIEC_NVME_PF_LOCAL_CTRL_REG_BASE + 0x1344) /* CQ Ring head doorbell */
#define HiPCIECTRL40V200_HIPCIEC_NVME_PF_LOCAL_CTRL_REG_CQHDBL_105_REG         (HiPCIECTRL40V200_HIPCIEC_NVME_PF_LOCAL_CTRL_REG_BASE + 0x134C) /* CQ Ring head doorbell */
#define HiPCIECTRL40V200_HIPCIEC_NVME_PF_LOCAL_CTRL_REG_CQHDBL_106_REG         (HiPCIECTRL40V200_HIPCIEC_NVME_PF_LOCAL_CTRL_REG_BASE + 0x1354) /* CQ Ring head doorbell */
#define HiPCIECTRL40V200_HIPCIEC_NVME_PF_LOCAL_CTRL_REG_CQHDBL_107_REG         (HiPCIECTRL40V200_HIPCIEC_NVME_PF_LOCAL_CTRL_REG_BASE + 0x135C) /* CQ Ring head doorbell */
#define HiPCIECTRL40V200_HIPCIEC_NVME_PF_LOCAL_CTRL_REG_CQHDBL_108_REG         (HiPCIECTRL40V200_HIPCIEC_NVME_PF_LOCAL_CTRL_REG_BASE + 0x1364) /* CQ Ring head doorbell */
#define HiPCIECTRL40V200_HIPCIEC_NVME_PF_LOCAL_CTRL_REG_CQHDBL_109_REG         (HiPCIECTRL40V200_HIPCIEC_NVME_PF_LOCAL_CTRL_REG_BASE + 0x136C) /* CQ Ring head doorbell */
#define HiPCIECTRL40V200_HIPCIEC_NVME_PF_LOCAL_CTRL_REG_CQHDBL_110_REG         (HiPCIECTRL40V200_HIPCIEC_NVME_PF_LOCAL_CTRL_REG_BASE + 0x1374) /* CQ Ring head doorbell */
#define HiPCIECTRL40V200_HIPCIEC_NVME_PF_LOCAL_CTRL_REG_CQHDBL_111_REG         (HiPCIECTRL40V200_HIPCIEC_NVME_PF_LOCAL_CTRL_REG_BASE + 0x137C) /* CQ Ring head doorbell */
#define HiPCIECTRL40V200_HIPCIEC_NVME_PF_LOCAL_CTRL_REG_CQHDBL_112_REG         (HiPCIECTRL40V200_HIPCIEC_NVME_PF_LOCAL_CTRL_REG_BASE + 0x1384) /* CQ Ring head doorbell */
#define HiPCIECTRL40V200_HIPCIEC_NVME_PF_LOCAL_CTRL_REG_CQHDBL_113_REG         (HiPCIECTRL40V200_HIPCIEC_NVME_PF_LOCAL_CTRL_REG_BASE + 0x138C) /* CQ Ring head doorbell */
#define HiPCIECTRL40V200_HIPCIEC_NVME_PF_LOCAL_CTRL_REG_CQHDBL_114_REG         (HiPCIECTRL40V200_HIPCIEC_NVME_PF_LOCAL_CTRL_REG_BASE + 0x1394) /* CQ Ring head doorbell */
#define HiPCIECTRL40V200_HIPCIEC_NVME_PF_LOCAL_CTRL_REG_CQHDBL_115_REG         (HiPCIECTRL40V200_HIPCIEC_NVME_PF_LOCAL_CTRL_REG_BASE + 0x139C) /* CQ Ring head doorbell */
#define HiPCIECTRL40V200_HIPCIEC_NVME_PF_LOCAL_CTRL_REG_CQHDBL_116_REG         (HiPCIECTRL40V200_HIPCIEC_NVME_PF_LOCAL_CTRL_REG_BASE + 0x13A4) /* CQ Ring head doorbell */
#define HiPCIECTRL40V200_HIPCIEC_NVME_PF_LOCAL_CTRL_REG_CQHDBL_117_REG         (HiPCIECTRL40V200_HIPCIEC_NVME_PF_LOCAL_CTRL_REG_BASE + 0x13AC) /* CQ Ring head doorbell */
#define HiPCIECTRL40V200_HIPCIEC_NVME_PF_LOCAL_CTRL_REG_CQHDBL_118_REG         (HiPCIECTRL40V200_HIPCIEC_NVME_PF_LOCAL_CTRL_REG_BASE + 0x13B4) /* CQ Ring head doorbell */
#define HiPCIECTRL40V200_HIPCIEC_NVME_PF_LOCAL_CTRL_REG_CQHDBL_119_REG         (HiPCIECTRL40V200_HIPCIEC_NVME_PF_LOCAL_CTRL_REG_BASE + 0x13BC) /* CQ Ring head doorbell */
#define HiPCIECTRL40V200_HIPCIEC_NVME_PF_LOCAL_CTRL_REG_CQHDBL_120_REG         (HiPCIECTRL40V200_HIPCIEC_NVME_PF_LOCAL_CTRL_REG_BASE + 0x13C4) /* CQ Ring head doorbell */
#define HiPCIECTRL40V200_HIPCIEC_NVME_PF_LOCAL_CTRL_REG_CQHDBL_121_REG         (HiPCIECTRL40V200_HIPCIEC_NVME_PF_LOCAL_CTRL_REG_BASE + 0x13CC) /* CQ Ring head doorbell */
#define HiPCIECTRL40V200_HIPCIEC_NVME_PF_LOCAL_CTRL_REG_CQHDBL_122_REG         (HiPCIECTRL40V200_HIPCIEC_NVME_PF_LOCAL_CTRL_REG_BASE + 0x13D4) /* CQ Ring head doorbell */
#define HiPCIECTRL40V200_HIPCIEC_NVME_PF_LOCAL_CTRL_REG_CQHDBL_123_REG         (HiPCIECTRL40V200_HIPCIEC_NVME_PF_LOCAL_CTRL_REG_BASE + 0x13DC) /* CQ Ring head doorbell */
#define HiPCIECTRL40V200_HIPCIEC_NVME_PF_LOCAL_CTRL_REG_CQHDBL_124_REG         (HiPCIECTRL40V200_HIPCIEC_NVME_PF_LOCAL_CTRL_REG_BASE + 0x13E4) /* CQ Ring head doorbell */
#define HiPCIECTRL40V200_HIPCIEC_NVME_PF_LOCAL_CTRL_REG_CQHDBL_125_REG         (HiPCIECTRL40V200_HIPCIEC_NVME_PF_LOCAL_CTRL_REG_BASE + 0x13EC) /* CQ Ring head doorbell */
#define HiPCIECTRL40V200_HIPCIEC_NVME_PF_LOCAL_CTRL_REG_CQHDBL_126_REG         (HiPCIECTRL40V200_HIPCIEC_NVME_PF_LOCAL_CTRL_REG_BASE + 0x13F4) /* CQ Ring head doorbell */
#define HiPCIECTRL40V200_HIPCIEC_NVME_PF_LOCAL_CTRL_REG_CQHDBL_127_REG         (HiPCIECTRL40V200_HIPCIEC_NVME_PF_LOCAL_CTRL_REG_BASE + 0x13FC) /* CQ Ring head doorbell */

#endif // __HIPCIEC_NVME_PF_LOCAL_CTRL_REG_REG_OFFSET_H__
